The intention to write this article is to express my thoughts on microprocessor architectures. I am not an expert in microprocessor architectures but I have my own lifelong interests in microprocessors and computing. Microprocessors are extremely fascinating and are the fundamental building blocks of our information age and digital technologies.

Traditionally, industry has paid relatively more attention towards software and services. It’s also self-evident that software has made enormous progress in terms of ease in development, easy access, open standards, sharing, reusability, and collaboration. On the other hand, hardware (microchip) has pretty much gone in the opposite direction in connection to ease in development, sharing, open standards and collaboration. The reason being mainly the microprocessor architecture and instruction sets kept proprietary for the most part. Also the hardware with its very own nature is difficult to develop and can not be easily shared.

There are two main schools of thought in microprocessor architecture, namely RISC (Reduced Instruction Set Computer) and CISC (Complex Instruction Set Computer) architectures. Interestingly RISC is the oldest one, however it has been dominated by CISC. However, in the past decades RISC is showing a big comeback, and it is now a de facto standard for mobile devices.

We know that RISC is not really new, the concept has been present since late 70s. To understand both architectures development, we first should understand the evolution of microprocessors and its common building blocks, chip fabrication, and ideology.

Microprocessor architectures

A microprocessor architecture describes CPU components, and how the components of a CPU are interconnected. CPU is the brain of any computation system or device. To make sense of different microprocessor architectures, it is important we understand the very basic building blocks of microprocessor or commenced known as CPU.

Registers

Registers presents the smallest amount of storage in the memory hierarchy of a computer. They are extremely fast in both reads and writes. But this comes with a downside that they are the most expensive one in the memory hierarchy, and therefore the amount available is significantly less than the main memory. There are several types of registers, and special purposed, such as MAR (Memory Address Register), MBR (Memory Buffer Register), MDR (Memory Data Register), and PC (Program Control) etc.

Control Unit (CU)

Control Unit is another important building block of CPUs. The primary function of a CU is to access program instructions, decode them, and control the flow of data from-to Arithmetic Logic Unit, registers, caches, main memory. CU acts like a captain and gives command to other components in the CPU. It also handles multiple tasks, such as fetching, decoding, execution handling and storing results.

Arithmetic Logic Unit (ALU)

Arithmetic Logic Unit performs operations like binary arithmetic calculations, and doing logical operations. It loads data from registers, whereas CU tells which operations to perform on the data. After ALU performs the operations it stores to output registers.

After having understood the basic building blocks of microprocessors, we can look into two well known microprocessor architectures, namely RISC and CISC.

CISC architecture

CISC based microprocessors use complex instructions. Here the complexity of instructions is attributed to the number of actions a single instruction performs. The benefits of CISC instructions are that they require less number of instructions to perform a task and this also benefits the amount of memory needed. CISC was essentially designed with a goal of fewer instruction cycles that can perform several low-level operations.

Over time, the size of the CPU and complexity of the instruction set got increased as the detail of an instruction is largely implemented at the CPU level.

In the early days when memories (register, cache, and main memory) were relatively expensive so the focus stayed on the CISC architecture, especially on the desktop and server side.

CISC aims to simplify programming semantics in order to increase programming productivity, meaning achieving results with less number of lines written. The compiler has to work less to translate the programming language to the instruction set.

CISC aims to simplify programming semantics in order to increase programming productivity, meaning achieving results with less number of lines written.

We can summarize CISC with the followings:

• Complex type of instructions (100–200)
• Multiple cycle of duration
• Variable instruction format
• Sequential instruction execution
• Complex addressing mode
• Complexity tends towards CPU
• High energy consumption in comparison
• Memory efficient
• Short code size
• Hardware focused
• Single clock

RISC architecture

RISC based on the idea of reduced instruction. The philosophy behind RISC architecture was to have a CPU with a small but highly optimized set of instructions rather than more specialized set found in CISC. The competition between RISC and CISC had a lot of ups and downs.

RISC implements most of the complexity in the compiler instead in the CPU — unlike CISC.

We can summarize CISC with the followings:

• Highly optimized but fewer (reduced) instructions (30–40)
• One cycle of duration
• Instruction format fixed
• Parallel instruction execution
• Multiple register sets
• Complexity is mostly on the compiler side
• Memory access is limited to load and save
• Large number of registers (large register file)
• Overlapped register windows
• Energy efficient
• Large code size
• Multi-clock cycle

The performance evaluation

We need to assess computer performance in some measurable way so that architectural differences can be evaluated. It’s not really trivial to compare both architectures directly in just one given scenario.

The following well known equation is widely used for expressing computer’s performance ability:

CPU time = Instruction count (Total) * Cycle Per Instructions (Avg.) * Clock Cycle (Nano seconds)

The computer performance is directly proportional to the clock cycle time, cycle per instruction and instruction count. We can use the above equation to evaluate the performance difference between RISC and CISC. It should be noted that we are using an average case scenario.

Instruction Count

Computer architects can reduce the instruction count by adding more powerful instructions to the instruction set. However, this can increase either CPI (Clock Per Instruction or clock time, or both.

Clocks Per Instruction

Computer architects can reduce CPI by exploiting more instruction-level parallelism. If they add more complex instructions it often increases CPI.

Clock Time

Clock time depends on transistor speed and the complexity of the work done in a single clock. Clock time can be reduced when transistor sizes decrease. However, power consumption increases when clock time is reduced. This increase the amount of heat generated.

x86 vs ARM

There are two big camps of CISC or RISC: 1. ARM, and 2. x86. ARM being the biggest in terms of the number of CPUs out in products. Not so long ago, It was pretty much settled that ARM is the de facto standard for mobile computing and x86 for desktop and servers. However, in recent years we are seeing this reality is being changed gradually.

Apple is well known for being an industry trend setter. The adoption of ARM for their desktop/laptop line up may set a big trend in adoption of ARM in this space. It’s not the first time that Apple is trying to bring RISC into their desktop lineup. They earlier tried with PowerPC but didn’t get much success due to x86 dominance in chip fabrication technology mainly from Intel.

This argument of replacing x86 by ARM is still there. Even though there were many compelling arguments in favour of ARM. But the reality is a bit different. x86 still has a strong hold in the server and desktop market. x86 also has a strong hold in console and PC gaming, and there is no sign of slowing down.

ARM is slowly entering in the server and desktop market but it may take some time sometimes before it will become a full competitor.

x86 enjoyed a long period of time in the market and had a huge amount of software support, whereas ARM is still trying to catch up. However the gap is reducing rapidly.

x86 previously tried to take some parts of ARM’s dominant area (mobile) however it was a failure as x86 couldn’t just compete with the efficiency of ARM in terms of power performance ratio.

Looking at the long term future, it is very likely ARM will end up dominating the x86 market.

The emergence of RISC-V and could it be a game changer?

In the last few years RISC-V gained a huge amount of attention. Unlike ARM, RISC-V is a non proprietary RISC architecture. It’s expected that RISC-V will further accelerate the adoption of RISC architecture.

RISC-V will be more flexible, and extendable. Which makes companies to design SoCs according to their own needs.

RISC-V won’t replace x86 or ARM same as Linux didn’t replace windows or mac.

Though it is very likely it will play a similar role as linux did in operating systems. RISC-V may revolutionize the whole chip industry in several ways. Startups can bring their solutions faster to markets. It will be cost effective with no intellectual property requirements.

Geo politics

In recent years, we have witnessed countries trying to use technology as a monopoly as well as strategic assets. Today many countries heavily use microchips in their weapons and defence systems, and are becoming increasingly dependent on using them in modern warfare. Lacking capability to manufacture own microchips means having dependency on other countries, which can be a bottleneck and weakness not being fully independent when ensuring self defence. Countries like China, Russia, India, all are trying to become more independent in microchip manufacturing and microchip design and architecture.

Economy may be even a bigger aspect. Countries are relying more and more on high-tech industry, and microchips play the core part of technology based economy.

No single country today can be competitive without having modern digital services. One of the most recent examples is the US bans Huawei for many of their products, i.e. 5G networks and use of OS on their smartphones. This was a big blow to Huawei and brought their phone business from being no 1. selling phones in the world to no. 3. This has made many not only China but also many countries to realize how important it is to be independent in microprocessor design, and manufacturing but also having independence in microprocessor architecture. Moreover, not having to manufacture their own can be risky in terms of security and backdoors.

Currently the world has been experiencing a huge microchip shortage. This is generally attributed to COVID-19, but it is actually an oversimplification. Yes covid has contributed to the shortage but the core problem was few cutting edge fabs in operations and higher demands.

Future perspective

When looking at the trend, it is clear that RISC based architectures are rising in both server and desktop segments. The trend will most likely to accelerate with the further adoption of ARM and RISC V. Moreover, RISC V will open up further adoption of RISC being open standard. However, CISC will still continue to dominate in server and desktops space for some times.